CS232 Lab 1: Digital Logic CAD Tools

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The purpose of this lab is to familiarize you with logic gates and basic digital logic design techniques. We will be using a digital logic CAD program, Quartus, to generate our designs using a graphic layout tool. We will then use a second simulation tool, ModelSim, to test our designs and ensure they are working correctly.

The first two projects you will need to complete on your own. The following projects you may work with a partner.


Tasks

  1. Start Quartus by opening a terminal and typing:

    /opt/altera/12.1/quartus/bin/quartus

    If you want to put quartus in the background, add an ampersand (&) to the end of the command line.

    The first time you run Quartus, you will need to tell it where the license file is. It is here:

    /opt/altera/12.1/license.dat

    Quartus should start up and display a window with the option of creating a new project, opening an interactive tutorial, or opening an existing project. It might be a good idea to go through the tutorial on your own time.

    Specify where you want to put the project and a name for it and the top level design entity. As noted, the project name and entity name must be identical. You should put each project in its own sub-directory, probably inside a cs232 folder.

    Specify the device we will eventually program with our circuit. The device on the DE1 board is a Cyclone II FPGA with the name EP2C20F484C7.

    In the EDA Tool settings, set the Simulation entry to ModelSim-Altera with the format VHDL. That should complete your project setup.

    After creating the project, select File::New and pick a Block Diagram/Schematic File.

    In the block diagram file you can now lay out circuits graphically and connect them with virtual wires.

  2. Using the graphic layout tool, make a simple combinational logic tree for the function F = AB + A'B'. Double-click to place a new module. There are many types of modules. We want to use a simple primitive logic gate, as shown below.

    Lay out two 2-input AND gates and one 2-input OR gate to build the circuit. Then connect the output of each AND gate to the inputs on the OR gate. You can click and drag to make wires.

    Create two input pins and one output pin, again by double-clicking and then selecting input or output from the pins category. Place the pins in the upper left (inputs) and upper right (outputs) of your graphical design. Then edit the names so the pins are named A, B, and F.

    Next, make a small wire coming out of each input pin and a small wire coming into the output pin. Label these as A, B, and F, respectively. By labeling wires you can make virtual connections between them.

    Next, add two NOT gates in front of the second AND gate and feed the A and B inputs to the NOT gates. The final circuit is shown below.

    Select File->Save Project and save your work as a bdf file.

  3. Compile the circuit by selecting Processing::Start compilation. Once complete, select Processing::Start::Start EDA_Netlist Writer. Now you are ready to start the simulation process.

    Select Tools::Run Simulation Tool::Gate Level Simulation. This should start ModelSim. If it does not, then you probably need to set the path to ModelSim. Do this by selecting Tool::Options. Then select the panel for EDA simulation tools. It has a line for ModelSim Altera. Enter the string:

    /opt/altera/12.1/modelsim_ase/linux

    Once ModelSim is open, select Compile::Compile. Then select circui1.vho and click Compile. When the compilation is done, click Done to close the window.

    On the Transcript prompt, type vsim circuit1. This will create 3 subwindows. In the left window, select the Library tab (it is at the bottom).

    In the Library window, expand the "work" tree (it should be on top), right-click on circuit1, and select Create Wave. It should put three new items in the Wave window. Stretch the column with the names of those items. You will need A and B, but can delete F (with the delete button). We're going to make it a clock input that lasts for 1000ps with a period of 100ps. Right-click on Edit:/circuit1/A in teh Wave window and select Edit::Create/Modify Waveform.

    Finish by specifying the clock to have the proper period (100ns) and an initial value of 0. Repeat the process with B, but make sure it has a period of 200ns.

    Now, go to the middle window and right-click on the F object. Select "Add Wave". Finally, in the Transcript window, type run 1000ps. This should simulate the circuit and show you the resulting waveform of the output signal F. (Note: if you want to rerun the simulation, then you need to type "restart" in the Transcript window, before reissueing the run command.)

    We'll cover pin assignments and programming the board next week.

When you have completed the lab assignment, go ahead and get started on the first project.