<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE Machine [
<!ELEMENT Machine (PunctChar*, Field*, FileChannel*, Register*, RegisterArray*, ConditionBit*, RAM*, Set*, Test*, Increment*, Shift*, Logical*, Arithmetic*, Branch*, TransferRtoR*, TransferRtoA*, TransferAtoR*, Decode*, SetCondBit*, IO*, MemoryAccess*, End, EQU*, FetchSequence, MachineInstruction*, HighlightingInfo?, LoadingInfo?, ModuleWindowsInfo?) >
<!ATTLIST Machine name CDATA "unnamed">
<!ELEMENT PunctChar EMPTY>
<!ATTLIST PunctChar char CDATA #REQUIRED use  (symbol|token|label|comment|pseudo|illegal) #REQUIRED>
<!ELEMENT Field (FieldValue*)>
<!ATTLIST Field name CDATA #REQUIRED type  (required|optional|ignored) #REQUIRED numBits CDATA #REQUIRED relativity (absolute|pcRelativePreIncr|pcRelativePostIncr) #REQUIRED defaultValue CDATA #REQUIRED signed (true|false) #REQUIRED offset CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT FieldValue EMPTY>
<!ATTLIST FieldValue name CDATA #REQUIRED value CDATA #REQUIRED>
<!ELEMENT FileChannel EMPTY>
<!ATTLIST FileChannel file CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Register EMPTY>
<!ATTLIST Register name CDATA #REQUIRED width CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT RegisterArray (Register+)>
<!ATTLIST RegisterArray name CDATA #REQUIRED width CDATA #REQUIRED length CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT ConditionBit EMPTY>
<!ATTLIST ConditionBit name CDATA #REQUIRED bit CDATA #REQUIRED register IDREF #REQUIRED halt (true|false) "false" id ID #REQUIRED>
<!ELEMENT RAM EMPTY>
<!ATTLIST RAM name CDATA #REQUIRED length CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Increment EMPTY>
<!ATTLIST Increment name CDATA #REQUIRED register IDREF #REQUIRED overflowBit IDREF #IMPLIED delta CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Arithmetic EMPTY>
<!ATTLIST Arithmetic name CDATA #REQUIRED type (ADD|SUBTRACT|MULTIPLY|DIVIDE) #REQUIRED source1 IDREF #REQUIRED source2 IDREF #REQUIRED destination IDREF #REQUIRED overflowBit IDREF #IMPLIED  carryBit IDREF #IMPLIED  id ID #REQUIRED>
<!ELEMENT TransferRtoR EMPTY>
<!ATTLIST TransferRtoR name CDATA #REQUIRED source IDREF #REQUIRED srcStartBit CDATA #REQUIRED dest IDREF #REQUIRED destStartBit CDATA #REQUIRED numBits CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT TransferRtoA EMPTY>
<!ATTLIST TransferRtoA name CDATA #REQUIRED source IDREF #REQUIRED srcStartBit CDATA #REQUIRED dest IDREF #REQUIRED destStartBit CDATA #REQUIRED numBits CDATA #REQUIRED index IDREF #REQUIRED indexStart CDATA #IMPLIED indexNumBits CDATA #IMPLIED id ID #REQUIRED>
<!ELEMENT TransferAtoR EMPTY>
<!ATTLIST TransferAtoR name CDATA #REQUIRED source IDREF #REQUIRED srcStartBit CDATA #REQUIRED dest IDREF #REQUIRED destStartBit CDATA #REQUIRED numBits CDATA #REQUIRED index IDREF #REQUIRED indexStart CDATA #IMPLIED indexNumBits CDATA #IMPLIED id ID #REQUIRED>
<!ELEMENT Shift EMPTY>
<!ATTLIST Shift name CDATA #REQUIRED source IDREF #REQUIRED destination IDREF #REQUIRED type (logical | arithmetic | cyclic) #REQUIRED direction (right | left) #REQUIRED distance CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Branch EMPTY>
<!ATTLIST Branch name CDATA #REQUIRED amount CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Logical EMPTY>
<!ATTLIST Logical name CDATA #REQUIRED source1 IDREF #REQUIRED source2 IDREF #REQUIRED destination IDREF #REQUIRED type (AND | OR | NAND | NOR | XOR | NOT) #REQUIRED id ID #REQUIRED>
<!ELEMENT Set EMPTY>
<!ATTLIST Set name CDATA #REQUIRED register IDREF #REQUIRED start CDATA #REQUIRED numBits CDATA #REQUIRED value CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Test EMPTY >
<!ATTLIST Test name CDATA #REQUIRED register IDREF #REQUIRED start CDATA #REQUIRED numBits CDATA #REQUIRED comparison (EQ | NE | LT | GT | LE | GE ) #REQUIRED value CDATA #REQUIRED omission CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Decode EMPTY >
<!ATTLIST Decode name CDATA #REQUIRED ir IDREF #REQUIRED id ID #REQUIRED>
<!ELEMENT IO EMPTY >
<!ATTLIST IO name CDATA #REQUIRED direction (input | output) #REQUIRED type (integer | ascii | unicode) #REQUIRED buffer IDREF #REQUIRED connection CDATA #IMPLIED id ID #REQUIRED>
<!ELEMENT MemoryAccess EMPTY >
<!ATTLIST MemoryAccess name CDATA #REQUIRED direction (read | write ) #REQUIRED memory IDREF #REQUIRED data IDREF #REQUIRED address IDREF #REQUIRED id ID #REQUIRED>
<!ELEMENT SetCondBit EMPTY >
<!ATTLIST SetCondBit name CDATA #REQUIRED bit IDREF #REQUIRED value (0 | 1) #REQUIRED id ID #REQUIRED>
<!ELEMENT End EMPTY>
<!ATTLIST End id ID #REQUIRED>
<!ELEMENT Microinstruction EMPTY>
<!ATTLIST Microinstruction microRef IDREF #REQUIRED>
<!ELEMENT MachineInstruction (Microinstruction*)>
<!ATTLIST MachineInstruction name CDATA #REQUIRED opcode CDATA #REQUIRED format CDATA #REQUIRED>
<!ELEMENT FetchSequence (Microinstruction*) >
<!ELEMENT EQU EMPTY>
<!ATTLIST EQU name CDATA #REQUIRED value CDATA #REQUIRED>
<!ELEMENT HighlightingInfo (RegisterRAMPair*)>
<!ELEMENT RegisterRAMPair EMPTY>
<!ATTLIST RegisterRAMPair register IDREF #REQUIRED ram IDREF #REQUIRED dynamic (true|false) #REQUIRED>
<!ELEMENT LoadingInfo EMPTY>
<!ATTLIST LoadingInfo ram IDREF #IMPLIED startingAddress CDATA "0">
<!ELEMENT ModuleWindowsInfo ((RegisterWindowInfo | RegisterArrayWindowInfo | RAMWindowInfo)*) >
<!ELEMENT RegisterWindowInfo EMPTY>
<!ATTLIST RegisterWindowInfo top CDATA "50" left CDATA "50" width CDATA "300" height CDATA "150" base (Decimal|Binary|Hexadecimal|Ascii)  "Decimal">
<!ELEMENT RegisterArrayWindowInfo EMPTY>
<!ATTLIST RegisterArrayWindowInfo array IDREF #REQUIRED top CDATA "50" left CDATA "50" width CDATA "300" height CDATA "150" base (Decimal|Binary|Hexadecimal|Ascii) "Decimal">
<!ELEMENT RAMWindowInfo EMPTY>
<!ATTLIST RAMWindowInfo ram IDREF #REQUIRED cellSize CDATA "1" top CDATA "50" left CDATA "50" width CDATA "450" height CDATA "450" contentsbase (Decimal|Binary|Hexadecimal|Ascii) "Decimal" addressbase (Decimal|Binary|Hexadecimal) "Decimal">
]>

<Machine name="Wombat2.cpu" >
	<!--............. Punctuation Options .............-->
	<PunctChar char="!" use="symbol" />
	<PunctChar char="#" use="symbol" />
	<PunctChar char="$" use="symbol" />
	<PunctChar char="%" use="symbol" />
	<PunctChar char="&amp;" use="symbol" />
	<PunctChar char="^" use="symbol" />
	<PunctChar char="_" use="symbol" />
	<PunctChar char="`" use="symbol" />
	<PunctChar char="*" use="symbol" />
	<PunctChar char="?" use="symbol" />
	<PunctChar char="@" use="symbol" />
	<PunctChar char="~" use="symbol" />
	<PunctChar char="+" use="symbol" />
	<PunctChar char="-" use="symbol" />
	<PunctChar char="(" use="token" />
	<PunctChar char=")" use="token" />
	<PunctChar char="," use="token" />
	<PunctChar char="/" use="token" />
	<PunctChar char="=" use="token" />
	<PunctChar char="[" use="token" />
	<PunctChar char="\" use="token" />
	<PunctChar char="]" use="token" />
	<PunctChar char="{" use="token" />
	<PunctChar char="|" use="token" />
	<PunctChar char="}" use="token" />
	<PunctChar char="." use="pseudo" />
	<PunctChar char=":" use="label" />
	<PunctChar char=";" use="comment" />

	<!--......... machine instruction fields ............-->
	<Field name="reg" type="required" numBits="3" relativity="absolute" signed="false" offset="0" defaultValue="0" id="Field8d8f67">
		<FieldValue name="A4" value="4" />
		<FieldValue name="A7" value="7" />
		<FieldValue name="A5" value="5" />
		<FieldValue name="A6" value="6" />
		<FieldValue name="A3" value="3" />
		<FieldValue name="A2" value="2" />
		<FieldValue name="A1" value="1" />
		<FieldValue name="A0" value="0" />
	</Field>
	<Field name="un3" type="ignored" numBits="3" relativity="absolute" signed="true" offset="0" defaultValue="0" id="Field87be0">
	</Field>
	<Field name="op" type="required" numBits="5" relativity="absolute" signed="false" offset="0" defaultValue="0" id="Fieldfce2f2">
	</Field>
	<Field name="un5" type="ignored" numBits="5" relativity="absolute" signed="true" offset="0" defaultValue="0" id="Field978611">
	</Field>
	<Field name="addr" type="required" numBits="8" relativity="absolute" signed="false" offset="0" defaultValue="0" id="Fielde2d858">
	</Field>
	<Field name="un8" type="ignored" numBits="8" relativity="absolute" signed="true" offset="0" defaultValue="0" id="Fielde9927a">
	</Field>
	<Field name="un11" type="ignored" numBits="11" relativity="absolute" signed="true" offset="0" defaultValue="0" id="Field8fc7a7">
	</Field>

	<!--............. FileChannels .................-->
	<!-- none -->

	<!--............. registers .....................-->
	<Register name="buffer1" width="16" id="module.Register7ccb2f" />
	<Register name="buffer2" width="16" id="module.Registerff8de3" />
	<Register name="ir" width="16" id="module.Registerbc448b" />
	<Register name="mar" width="12" id="module.Register383244" />
	<Register name="mdr" width="16" id="module.Register6c1bce" />
	<Register name="pc" width="12" id="module.Register95a253" />
	<Register name="status" width="3" id="module.Registerd41116" />

	<!--............. register arrays ...............-->
	<RegisterArray name="A" length="8" width="16" id="module.RegisterArrayadfbe3" >
		<Register name="A[0]" width="16" id="module.Register742c56" />
		<Register name="A[1]" width="16" id="module.Registeradf91" />
		<Register name="A[2]" width="16" id="module.Registerdbe72f" />
		<Register name="A[3]" width="16" id="module.Register26efd3" />
		<Register name="A[4]" width="16" id="module.Register4b35ef" />
		<Register name="A[5]" width="16" id="module.Registerc20611" />
		<Register name="A[6]" width="16" id="module.Register1c5c88" />
		<Register name="A[7]" width="16" id="module.Registerff0d4b" />
	</RegisterArray>

	<!--............. condition bits ................-->
	<ConditionBit name="halt" bit="0" register="module.Registerd41116" halt="true" id="module.ConditionBit8e8fbd" />

	<!--............. rams ..........................-->
	<RAM name="Main" length="256" id="module.RAM7ef45b" />

	<!--............. set ...........................-->
	<Set name="clear-mar" register="module.Register383244" start="0" numBits="12" value="0" id="microinstruction.CpusimSet69b66e" />
	<Set name="clear-pc" register="module.Register95a253" start="0" numBits="12" value="0" id="microinstruction.CpusimSet4828e7" />

	<!--............. test ..........................-->
	<Test name="if(buf1!=0)skip-2" register="module.Register7ccb2f" start="0" numBits="16" comparison="NE" value="0" omission="2" id="microinstruction.Test755866" />
	<Test name="if(buf1&gt;=0)skip-2" register="module.Register7ccb2f" start="0" numBits="16" comparison="GE" value="0" omission="2" id="microinstruction.Testfeb3a6" />
	<Test name="if(mar=IO)skip3" register="module.Register383244" start="0" numBits="12" comparison="EQ" value="254" omission="3" id="microinstruction.Testc492c8" />
	<Test name="if(mar=IO)skip4" register="module.Register383244" start="0" numBits="12" comparison="EQ" value="254" omission="4" id="microinstruction.Test80b4f9" />

	<!--............. increment .....................-->
	<Increment name="Inc2-pc" register="module.Register95a253" overflowBit="module.ConditionBit8e8fbd" delta="2" id="microinstruction.Incremente9493a" />

	<!--............. shift .........................-->
	<!-- none -->

	<!--............. logical .......................-->
	<!-- none -->

	<!--............. arithmetic ....................-->
	<Arithmetic name="buf1*buf2-&gt;buf1" type="MULTIPLY" source1="module.Register7ccb2f" source2="module.Registerff8de3" destination="module.Register7ccb2f" overflowBit="module.ConditionBit8e8fbd" id="microinstruction.Arithmeticc6bbd3" />
	<Arithmetic name="buf1+buf2-&gt;buf1" type="ADD" source1="module.Register7ccb2f" source2="module.Registerff8de3" destination="module.Register7ccb2f" overflowBit="module.ConditionBit8e8fbd" id="microinstruction.Arithmetic554189" />
	<Arithmetic name="buf1-buf2-&gt;buf1" type="SUBTRACT" source1="module.Register7ccb2f" source2="module.Registerff8de3" destination="module.Register7ccb2f" overflowBit="module.ConditionBit8e8fbd" id="microinstruction.Arithmetic41a32f" />
	<Arithmetic name="buf1/buf2-&gt;buf1" type="DIVIDE" source1="module.Register7ccb2f" source2="module.Registerff8de3" destination="module.Register7ccb2f" overflowBit="module.ConditionBit8e8fbd" id="microinstruction.Arithmetic40a1e1" />

	<!--............. branch ........................-->
	<!-- none -->

	<!--............. transferRtoR ..................-->
	<TransferRtoR name="buffer1-&gt;mdr" source="module.Register7ccb2f" srcStartBit="0" dest="module.Register6c1bce" destStartBit="0" numBits="16" id="microinstruction.TransferRtoR43c423" />
	<TransferRtoR name="ir(8-15)-&gt;mar" source="module.Registerbc448b" srcStartBit="8" dest="module.Register383244" destStartBit="4" numBits="8" id="microinstruction.TransferRtoR1ff83" />
	<TransferRtoR name="ir(8-15)-&gt;pc" source="module.Registerbc448b" srcStartBit="8" dest="module.Register95a253" destStartBit="4" numBits="8" id="microinstruction.TransferRtoR2e0e2f" />
	<TransferRtoR name="mdr-&gt;buffer1" source="module.Register6c1bce" srcStartBit="0" dest="module.Register7ccb2f" destStartBit="0" numBits="16" id="microinstruction.TransferRtoRa53564" />
	<TransferRtoR name="mdr-&gt;ir" source="module.Register6c1bce" srcStartBit="0" dest="module.Registerbc448b" destStartBit="0" numBits="16" id="microinstruction.TransferRtoR54782a" />
	<TransferRtoR name="pc-&gt;mar" source="module.Register95a253" srcStartBit="0" dest="module.Register383244" destStartBit="0" numBits="12" id="microinstruction.TransferRtoR9d2f6b" />

	<!--............. transferRtoA ..................-->
	<TransferRtoA name="buf1-&gt;A[ir(5-7)]" source="module.Register7ccb2f" srcStartBit="0" dest="module.RegisterArrayadfbe3" destStartBit="0" numBits="16" index="module.Registerbc448b" indexStart="5" indexNumBits="3" id="microinstruction.TransferRtoA8c5488" />
	<TransferRtoA name="buf1-&gt;A[ir(8-10)]" source="module.Register7ccb2f" srcStartBit="0" dest="module.RegisterArrayadfbe3" destStartBit="0" numBits="16" index="module.Registerbc448b" indexStart="8" indexNumBits="3" id="microinstruction.TransferRtoA1acff" />

	<!--............. transferAtoR ..................-->
	<TransferAtoR name="A[ir(5-7)]-&gt;buf1" source="module.RegisterArrayadfbe3" srcStartBit="0" dest="module.Register7ccb2f" destStartBit="0" numBits="16" index="module.Registerbc448b" indexStart="5" indexNumBits="3" id="microinstruction.TransferAtoR68c1e1" />
	<TransferAtoR name="A[ir(8-10)]-&gt;buf1" source="module.RegisterArrayadfbe3" srcStartBit="0" dest="module.Register7ccb2f" destStartBit="0" numBits="16" index="module.Registerbc448b" indexStart="8" indexNumBits="3" id="microinstruction.TransferAtoR90d4f2" />
	<TransferAtoR name="A[ir(8-10)]-&gt;buf2" source="module.RegisterArrayadfbe3" srcStartBit="0" dest="module.Registerff8de3" destStartBit="0" numBits="16" index="module.Registerbc448b" indexStart="8" indexNumBits="3" id="microinstruction.TransferAtoR8c666a" />

	<!--............. decode ........................-->
	<Decode name="Decode-ir" ir="module.Registerbc448b" id="microinstruction.Decode97d20c" />

	<!--............. set condition bit .............-->
	<SetCondBit name="set-halt-bit" bit="module.ConditionBit8e8fbd" value="1" id="microinstruction.SetCondBit5f3bad" />

	<!--............. io ............................-->
	<IO name="input-int-&gt;buf1" direction="input" type="integer" buffer="module.Register7ccb2f" connection="[console]" id="microinstruction.IO46fef3" />
	<IO name="output-buf1-&gt;int" direction="output" type="integer" buffer="module.Register7ccb2f" connection="[console]" id="microinstruction.IOc0ef2" />

	<!--............. memory access .................-->
	<MemoryAccess name="Main[mar]-&gt;mdr" direction="read" memory="module.RAM7ef45b" data="module.Register6c1bce" address="module.Register383244" id="microinstruction.MemoryAccessa93995" />
	<MemoryAccess name="mdr-&gt;Main[mar]" direction="write" memory="module.RAM7ef45b" data="module.Register6c1bce" address="module.Register383244" id="microinstruction.MemoryAccess396c7" />

	<!--............. end ...........................-->
	<End id="microinstruction.End9fe5e6" />

	<!--............. global equs ..................-->
	<EQU name="IO" value="254" />
	<EQU name="A7" value="7" />
	<EQU name="A6" value="6" />
	<EQU name="A5" value="5" />
	<EQU name="A4" value="4" />
	<EQU name="A3" value="3" />
	<EQU name="A2" value="2" />
	<EQU name="A1" value="1" />
	<EQU name="A0" value="0" />

	<!--............. fetch sequence ................-->
	<FetchSequence>
		<Microinstruction microRef="microinstruction.TransferRtoR9d2f6b" />
		<Microinstruction microRef="microinstruction.MemoryAccessa93995" />
		<Microinstruction microRef="microinstruction.TransferRtoR54782a" />
		<Microinstruction microRef="microinstruction.Incremente9493a" />
		<Microinstruction microRef="microinstruction.Decode97d20c" />
	</FetchSequence>

	<!--............. machine instructions ..........-->

	<MachineInstruction name="move" opcode="a" format="op reg reg un5" >
		<Microinstruction microRef="microinstruction.TransferAtoR90d4f2" />
		<Microinstruction microRef="microinstruction.TransferRtoA8c5488" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="divide" opcode="6" format="op reg reg un5" >
		<Microinstruction microRef="microinstruction.TransferAtoR68c1e1" />
		<Microinstruction microRef="microinstruction.TransferAtoR8c666a" />
		<Microinstruction microRef="microinstruction.Arithmetic40a1e1" />
		<Microinstruction microRef="microinstruction.TransferRtoA8c5488" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="multiply" opcode="5" format="op reg reg un5" >
		<Microinstruction microRef="microinstruction.TransferAtoR68c1e1" />
		<Microinstruction microRef="microinstruction.TransferAtoR8c666a" />
		<Microinstruction microRef="microinstruction.Arithmeticc6bbd3" />
		<Microinstruction microRef="microinstruction.TransferRtoA8c5488" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="subtract" opcode="4" format="op reg reg un5" >
		<Microinstruction microRef="microinstruction.TransferAtoR68c1e1" />
		<Microinstruction microRef="microinstruction.TransferAtoR8c666a" />
		<Microinstruction microRef="microinstruction.Arithmetic41a32f" />
		<Microinstruction microRef="microinstruction.TransferRtoA8c5488" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="exit" opcode="0" format="op un11" >
		<Microinstruction microRef="microinstruction.SetCondBit5f3bad" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="load" opcode="1" format="op reg addr" >
		<Microinstruction microRef="microinstruction.CpusimSet69b66e" />
		<Microinstruction microRef="microinstruction.TransferRtoR1ff83" />
		<Microinstruction microRef="microinstruction.Test80b4f9" />
		<Microinstruction microRef="microinstruction.MemoryAccessa93995" />
		<Microinstruction microRef="microinstruction.TransferRtoRa53564" />
		<Microinstruction microRef="microinstruction.TransferRtoA8c5488" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
		<Microinstruction microRef="microinstruction.IO46fef3" />
		<Microinstruction microRef="microinstruction.TransferRtoA8c5488" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="store" opcode="2" format="op reg addr" >
		<Microinstruction microRef="microinstruction.CpusimSet69b66e" />
		<Microinstruction microRef="microinstruction.TransferRtoR1ff83" />
		<Microinstruction microRef="microinstruction.TransferAtoR68c1e1" />
		<Microinstruction microRef="microinstruction.Testc492c8" />
		<Microinstruction microRef="microinstruction.TransferRtoR43c423" />
		<Microinstruction microRef="microinstruction.MemoryAccess396c7" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
		<Microinstruction microRef="microinstruction.IOc0ef2" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="add" opcode="3" format="op reg reg un5" >
		<Microinstruction microRef="microinstruction.TransferAtoR68c1e1" />
		<Microinstruction microRef="microinstruction.TransferAtoR8c666a" />
		<Microinstruction microRef="microinstruction.Arithmetic554189" />
		<Microinstruction microRef="microinstruction.TransferRtoA8c5488" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="jmp" opcode="7" format="op un3 addr" >
		<Microinstruction microRef="microinstruction.CpusimSet4828e7" />
		<Microinstruction microRef="microinstruction.TransferRtoR2e0e2f" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="jmpz" opcode="8" format="op reg addr" >
		<Microinstruction microRef="microinstruction.TransferAtoR68c1e1" />
		<Microinstruction microRef="microinstruction.Test755866" />
		<Microinstruction microRef="microinstruction.CpusimSet4828e7" />
		<Microinstruction microRef="microinstruction.TransferRtoR2e0e2f" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<MachineInstruction name="jmpn" opcode="9" format="op reg addr" >
		<Microinstruction microRef="microinstruction.TransferAtoR68c1e1" />
		<Microinstruction microRef="microinstruction.Testfeb3a6" />
		<Microinstruction microRef="microinstruction.CpusimSet4828e7" />
		<Microinstruction microRef="microinstruction.TransferRtoR2e0e2f" />
		<Microinstruction microRef="microinstruction.End9fe5e6" />
	</MachineInstruction>

	<!--............. highlighting info .............-->
	<HighlightingInfo>
		<RegisterRAMPair register="module.Register95a253" ram="module.RAM7ef45b" dynamic="false" />
	</HighlightingInfo>

	<!--............. loading info ..................-->
	<LoadingInfo ram="module.RAM7ef45b" startingAddress="0" />

	<!--............. module window info ............-->
	<ModuleWindowsInfo>
		<RAMWindowInfo ram="module.RAM7ef45b" cellSize="2" contentsbase="Binary" addressbase="Decimal" 
			top="8" left="523" width="473" height="634" />
		<RegisterArrayWindowInfo array="module.RegisterArrayadfbe3" base="Binary" 
			top="4" left="1047" width="270" height="219" />
		<RegisterWindowInfo base="Binary" 
			top="230" left="1044" width="266" height="210" />
	</ModuleWindowsInfo>

</Machine>
