Due: Friday, November 15, 2024, 11:00 am (start of the class)

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Pipelining

Given the following parameters, answer the questions below. Assume there is no need to stall to solve any hazard.

• Processing an instruction takes 10 steps.
• The single stage CPU has all 10 steps in one stage and 1 latch layer.
• A 10-stage CPU has to execute the same 10 steps in 10 stages, one step per stage, and will have a latch layer for each stage.
• The logic delay of each step is 3ns.
• The latch delay is 1ns.

1. What is the time needed to execute one instruction on the single stage CPU?
2. What is the time needed to execute one instruction on the 10-stage CPU?
3. Assume there is a 5-stage CPU, which has to execute the same 10 steps in 5 stages. This 5-stage CPU is designed in a way to avoid possible bottleneck. What is the time needed to execute one instruction on the 5-stage CPU?
4. What is the speedup for 1000 instructions using a 5-stage CPU?
5. What is the speedup for 1000 instructions using a 10-stage CPU?

Assume that 20% of the instructions needed to be executed are conditional branches.

6. What is the probability there are no conditional branches currently being executed in a 5-stage CPU?
7. What is the probability there are no conditional branches currently being executed in a 10-stage CPU?

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